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FORTH - INSTITUTE OF COMPUTER SCIENCE
FORTH - INSTITUTE OF COMPUTER SCIENCE
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Publications

Publications of Computer Architecture and VLSI Systems Laboratory (CARV)

Books (21)

Editor
  1. Stenstrom, P., Dubois, M., Katevenis, M.G.H., Gupta, R., & Ungerer, Th. (2008). High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Goteborg, Sweden, January 27-29, 2008, Proceedings. HiPEAC; Lecture Notes in Computer ScienceVol. 4917 Springer, (ISBN 978-3-540-77559-1).
  2. Sauveron, D., Markantonakis, C., Bilas, A., & Quisquater, J.J. (2007). Information Security Theory and Practices. Smart Cards, Mobile and Ubiquitous Computing Systems, First IFIP TC6 / WG 8.8 / WG 11.2 International Workshop, WISTP 2007, Heraklion, Crete, Greece, May 9-11, 2007, Proceedings. WISTP; Lecture Notes in Computer ScienceVol. 4462 Springer, (ISBN 978-3-540-72353-0).
  3. Talia, D., Bilas, A., & Dikaiakos, M. (2007). Knowledge and Data Management in GRIDs.  (pp. 254), Vol. XVIII Springer, (ISBN 978-0-387-37830-5).
Chapters (in book)
  1. Goz, D., Ieronymakis, G., Papaefstathiou, V., Dimou, N., Bertocco, S., Ragagnin, A., Tornatore, L., Taffoni, G., & Coretti, I. (2020). Direct N-Body Application on Low-Power and Energy-Efficient Parallel ArchitecturesParallel Computing: Technology Trends, Series: Advances in Parallel ComputingVol. 36 (pp. 583 - 592), IOS Press.
  2. Fatourou, P., Iaremko, M., Kanellou, E.K., & Kosmas, E. (2015). Algorithmic Techniques in STM DesignTransactional Memory. Foundations, Algorithms, Tools, and Applications : COST Action Euro-TM IC1001Vol. 8913 (pp. 101 - 126), Springer, (ISBN 978-3-319-14719-2 (Print) 978-3-319-14720-8 (Online)).
  3. Fatourou, P., & Dziuma, D.D, Kanellou, E.K. (2015). Consistency for Transactional Memory Computing Transactional Memory. Foundations, Algorithms, Tools, and Applications : COST Action Euro-TM IC1001Vol. 8913 (pp. 3 - 31), Springer, (ISBN 978-3-319-14719-2 (Print) 978-3-319-14720-8 (Online)).
  4. Attiya, H., & Fatourou, P. (2015). Disjoint-Access Parallelism in Software Transactional MemoryTransactional Memory. Foundations, Algorithms, Tools, and Applications : COST Action Euro-TM IC1001Vol. 8913 (pp. 72 - 97), Springer, (ISBN 978-3-319-14719-2 (Print) 978-3-319-14720-8 (Online)).
  5. Nou, R. , Cortes, T., Mavridis, S., & Sfakianakis, Y.S, Bilas, A. (2014). Multi/many core. High performance parallel I/O, Series: Chapman & Hall/CRC Computational Science. Chapter 32 (pp. 353 - 362), CRC Press, (ISBN 9781466582347).
  6. Kavadias, S.G., Katevenis, M.G.H., & Pnevmatikatos, D. (2011). Network Interface Design for Explicit Communication in Chip Multiprocessors. Designing Network-on-Chip Architectures in the Nanoscale Era, J. Flich and D. Bertozzi (Eds.).  (pp. 325 - 351), (ISBN 978-1-4398-3710-8).
  7. Kornaros, G., Papaefstathiou, I., & Pnevmatikatos, D. (2009). Real-time Monitoring and Diagnostic Services for Networks-on-Chip. Networks-on-chips: theory and practice.  (9) Taylor & Francis Group LLC - CRC Press, (ISBN 1420079786).
  8. Luna, J., Dikaiakos, M., Gjermundrod, H., Flouris, M.D., Marazakis, M., & Bilas, A. (2009). Using the gLite middleware to implement a secure Intensive Care Grid System.  Springer.
  9. Német, Z., Flouris, M.D., Lachaize, R., & Bilas, A. (2007). Conductor: Support for Autonomous Configuration of Storage Systems.  (pp. 67 - 81).
  10. Katevenis, M.G.H. (2007). Interprocessor Communication seen as Load-Store Instruction Generalization. The Future of Computing, essays in memory of Stamatis Vassiliadis. 28 Sep. (pp. 55 - 68), Delft, The Netherlands, (ISBN 978-90-807957-3-0).
  11. Flouris, M.D., Lachaize, R., & Bilas, A. (2007). Violin: A Framework for Extensible Block-Level Storage.  (pp. 83 - 98).
  12. Danalis, A., & Markatos, E.P. (2001). Web Caching: A Survey. Enterprise Networking: Multilayer Switching and Applications. .
  13. Markatos, E.P., & Leblanc, Th.J. (1999). Multiprogramming and Multiprocessing. Wiley Encyclopedia of Electrical and Electronics Engineering. .
  14. Flouris, M.D., & Markatos, E.P. (1999). Network RA, in High Performance Cluster Computing: Architectures and Systems. High Performance Cluster ComputingVol. 1, Architectures and Systems (pp. 383 - 408), Upper Saddle River, NJ: Prentice Hall PTR.
  15. Markatos, E.P., & Leblanc, Th.J. (1996). Locality-Based Scheduling in Shared-Memory Multiprocessors. In Parallel Computing: Paradigms and Applications.  (8) (pp. 237 - 276), International Thomoson Computer Press, (ISBN 1-85032188-4).
  16. Katevenis, M.G.H. (1995). RISC Architectures. In Parallel and Distributed Computing Handbook.  McGraw-Hill, (ISBN 0-07-073020-).
  17. Markatos, E.P. (1994). How Architecture Evolution Influences the Scheduling Discipline used in Shared-Memory Multiprocessors. Parallel Computing: Trends and Applications, PARCO '93.  (pp. 627 - 630), Grenoble, France: Elsevier.
Edited Proceedings
  1. Gritzalis, S., Plexousakis, D., & Pnevmatikatos, D. (2009). PCI 2009, 13th Panhellenic Conference on Informatics, 10-12 September 2009, Corfu, Greece. Panhellenic Conference on Informatics.  IEEE Computer Society, (ISBN 978-0-7695-3788-7).
Found: 21 publications